liendolucas 23 minutes ago

> ...they mentioned that it would be interesting to get high resolution images of the 80386 die and try to extract the microcode from it.

Can someone explain how is that from a high resolution image of the die the microcode can be reconstructed? I'm really curious, what's the process? Is the output some sort of Verilog? Does the process involve recognizing each and every transistor and model a circuit from that? I'm fascinated that something like this is possible at all...

  • dboreham 15 minutes ago

    The microcode is in a ROM. It's a regular structure where a 1 looks different to a 0.

    • jdblair 9 minutes ago

      Yes, literally this. No verilog decode, just looking for signals in the image of a 1 vs. a 0. For example, a 1 may be the existence of a transistor at a particular intersection of wiring.

bmenrigh 49 minutes ago

The black box analysis needed to decode this is incredibly hard but also incredibly fun and rewarding to pull off. Very impressive work.

mettamage 58 minutes ago

For me, this is peak Hacker News. I am happy I took the hard courses at uni to understand a post like this. I’m also happy that HN was there to stimulate this thinking at the time (2015). Even if I now don’t really do anything with my humble knowledge of low level programming, every time it feels consciousnesses enriching. And it’s an awesome feeling.

For people that don’t have access to a uni, I recommend nand2tetris.org

  • morphle 47 minutes ago

    Just building your own microprocessor from gates is an easier way to learn about designing microcode and understanding how processors work(ed). But it can't hurt to study a few simple old designs like RISC or Transputer. The 80386 is on the other side of that spectrum, needlessly complicated because they wanted to be backwards compatible with an old bad design.

    There certainly is no need to go to university to learn chip design. Watching a few Alan Kay talks [3] or browsing Bitsavers computer designs [4] are good starting points.

    We made an easier way (than FPGA) to simulate and convert your gate level design into transistors on a chip (for less than $200 in 2026). We call it Morphle Logic [1].

    Eventually you grow into making the largest fastest and cheapest supercomputer wafer scale integration [2].

    [1] https://github.com/fiberhood/MorphleLogic/blob/main/README_M...

    [2]https://www.youtube.com/watch?v=vbqKClBwFwI

    [3] https://www.youtube.com/watch?v=f1605Zmwek8

    [4] http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/alto/...

    • joleyj 23 minutes ago

      > needlessly complicated because they wanted to be backwards compatible with an old bad design.

      It's not really needless complication of there is a reason for the complication. Obvioudsly in this case the need to be backward compatible with an old design made the implemtation more complicated than if they didn't need to do that. There were very, very strong business reasons why backward compatibility was a design requirment.

  • deskamess 17 minutes ago

    Do you know if nand2tetris covers/uses microcode?